Senior/Staff ASIC Design Verification Engineer
Synopsys View all jobs
- Ho Chi Minh City
- Permanent
- Full-time
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custom_fields.CareerAreas-ASIC-Digital-Design custom_fields.SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-03-08 custom_fields.Multikeywordfacets-Hardware">Join our Talent Community! .Find Jobs ForWhere? Search JobsSenior/Staff ASIC Design Verification EngineerHo Chi Minh City, Ho Chi Minh, VietnamEngineeringEmployeeSave Job ShareJump toOverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.Play VideoJob DescriptionDate posted 03/08/2026Category Engineering Hire Type Employee Job ID 15994 Remote Eligible No Date Posted 03/08/2026Job Descriptions
- Collaborate with digital design teams to develop high-speed mixed-signal PHY IPs.
- Participate in RTL and Gate-Level Simulation (GLS) verification for mixed-signal designs.
- Define, develop, and execute functional verification plans and test strategies.
- Conduct RTL and SDF-annotated gate-level simulations using UVM-based methodologies.
- Generate VCD files and perform power analysis/reporting using PrimeTime PX.
- Minimum of 2 years of experience in ASIC RTL design flow. (Candidates with extensive experience will be considered for senior/lead positions.)
- Proficiency in RTL and GLS verification, with strong debugging capabilities.
- Excellent teamwork and communication skills, with professional proficiency in English.
- Strong knowledge of high-speed interface protocols (e.g., DDR, HBM, or PCIe PHYs) is a distinct advantage.