ACG_2901_JOBOur client is a leading company specialized in technology who is looking for a qualified candidate to join their firm.Lead and perform verification tasks for digital designs as well as develop and validate internal or user verification components (iVCs/uVCs).Analyze design specifications and requirements to define comprehensive verification plans.Drive the verification of IP blocks using methodologies such as Formal verification, SystemVerilog, and UVM.Collaborate in refining verification workflows and methodologies for continuous improvement.Ensure effective execution of assigned projects and verification activities across the team.Coordinate closely with the Group Director to support design and micro-architecture teams.RequirementsBachelor’s or higher degree in Electronics Engineering or Computer Engineering.Minimum 5 years of hands-on experience in digital verification within the semiconductor industry.Proven ability in building and applying verification environments and techniques at the IP or subsystem level.Strong command of SystemVerilog, Verilog, UVM, and/or VMM verification frameworks.Passionate about verification strategy, methodology, and applying best practices.Proficient in English, both written and verbal.Familiarity with IP design concepts and micro-architecture is an asset.Previous leadership or team management experience is highly desirable — however, candidates with strong technical depth seeking a transition into an engineering management role are also welcome.Comfortable working with and supporting technical leaders.Willing to travel occasionally to align with leadership teams across locations.Enthusiastic about collaborating across distributed teams (Vietnam/ Europe) and capable of mentoring and motivating engineering team members.Contact: Giang Tran or Giau NguyenDue to the immense number of applications, only shortlisted candidates will be contacted.
