ASIC Digital Design, Sr Staff Engineer

• Our Digital Team is seeking for great Senior Staff to join our talented team.
• If you are an experienced Digital Senior Staff who wants to join a team of experts in dynamic digital design with latest process technologies and a great team player, this can be a perfect position for you.

• SNPS is the world number one IP provider: Opportunities to work with many experts from around the world and talented Viet Nam engineering team
• Professional, innovative, fair and fun working environment. Strong culture company.
• Competitive salary and benefit. Dedicated support from company for health: Insurance, Sport clubs: Football, Table-tennis, Badminton, Yoga, Zumba …
• Dedicated support from company for team building, social activities: Team trip, Family Day…
• Opportunity to get in touch with the complete design flow of a real complicated Analog Mixed Signal Design from specification to silicon.
• Chance to work with bleeding edge technologies that enable Data Center, AI/ML, 5G applications.
• Clear career path of self-development to either Technical Expert or Design Leader/Manager
• Travel to USA, Europe and Asia for training or on-site support.

• Responsible for specification development, architecture design and RTL development
• Define synthesis design constraints, resolving STA issue and Gate level simulation issue
• Working with Verification team and review the Verification plan mapping with specification
• Solid knowledge from RTL to GDS and silicon bring up experiences
• Perform Project leadership role if required.
• Communication directly with customer and cross-team collaboration.
• Drive the digital flow development
• Represents the organization on business unit

• Work in a Digital and Verification team during the development and validation for high-speed interface IP.
• Test planning, checklist, Coverage and Assertion planning
• Creating detailed Verification Environment from Functional Specifications
• Applying advanced verification techniques: constrained random generation, functional coverage, assertions, and formal verification.
• Writing test cases, checkers, and coverage that implement the verification test plan.
• Debug of simulations, including those of real signals modeled using SV for analog
• RTL, GLS & Co-simulations & coverage closure
• Participate in technical reviews and contribute effectively
• Participate in customer bring-up of IP in customer simulation environment
• Follow and improve development process ensuring high quality output.

• BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications.
• 8+ years of experience in RTL-to-GDS design
• Deep technical knowledge of RTL-to-GDS full design flow
• Strong scripting skills (Perl, tcl, Python)
• Strong communication both verbally and in writing
• Experience in Analog Mixed Signal is a big plus
• Highly responsible, result oriented.
• Self-motivated and highly enthusiasm in technology and solving problems

Synopsys